Holiday Inn Express
1350 North Fourth Street
San Jose, CA
6:00 p.m. Monday, May 20, 2013
This is one the best IC Layout training programs in the industry. It is part 1 of a 2 course series that covers semiconductor process technologies from 23nm CMOS to 0.35um BCD and explores Analog, Mixed-Signal and RF layout skills. Instructors are seasoned engineers with deep understanding of physical design, class assignments and practice examples are realistic and are taken from actual design projects. Duration of this training program is 12 weeks.
This amount includes full tuition plus fees. There are no other costs involved. Tuition plus all fees 2,950.00